Kyōto Daigaku Kōgakubu
Overview
Works: | 99 works in 116 publications in 2 languages and 348 library holdings |
---|---|
Genres: | Periodicals History Bibliographies Inscriptions |
Roles: | Other, Editor |
Classifications: | TA4, 620.005 |
Publication Timeline
.
Most widely held works about
Kyōto Daigaku
- Kagakushatachi no Kyōto Gakuha : Kita Gen'itsu to Nihon no kagaku by Yasu Furukawa( Book )
- Kyōto Daigaku kenchikugaku 100-nen no ayumi = 100 years of Kyoto University architecture( Book )
- Kyōto Daigaku Kōgakubu hachijūnenshi( Book )
- Kyōto Daigaku jieikan nyūgaku hantai tōsō no kiroku 1964-1967 by Kyōto Daigaku Gosha Renraku Kaigi( Book )
- Kyōto Daigaku Kōgakubu Kōgaku Sōgō Sentā yōran by Kyōto Daigaku( )
more

fewer

Most widely held works by
Kyōto Daigaku
Memoirs of the Faculty of Engineering, Kyoto University by
Kyōto Daigaku(
)
in English and held by 128 WorldCat member libraries worldwide
in English and held by 128 WorldCat member libraries worldwide
Kyōto Daigaku kōgaku kenkyū by
Kyōto Daigaku(
)
in Japanese and held by 9 WorldCat member libraries worldwide
in Japanese and held by 9 WorldCat member libraries worldwide
Daitōa kenchiku ronbun sakuin by
Kyōto Daigaku(
Book
)
1 edition published in 1944 in Japanese and held by 6 WorldCat member libraries worldwide
1 edition published in 1944 in Japanese and held by 6 WorldCat member libraries worldwide
Sūri kōgaku no susume(
Book
)
2 editions published in 2000 in Japanese and held by 5 WorldCat member libraries worldwide
2 editions published in 2000 in Japanese and held by 5 WorldCat member libraries worldwide
Memoirs of the Faculty of Engineering by
Kyōto Daigaku(
)
in English and held by 5 WorldCat member libraries worldwide
in English and held by 5 WorldCat member libraries worldwide
Coastal engineering researches at Kyoto University(
)
in English and held by 5 WorldCat member libraries worldwide
in English and held by 5 WorldCat member libraries worldwide
Seikatsu jūtaku chiiki keikaku by Yūki Kinutani(
Book
)
1 edition published in 1965 in Japanese and held by 4 WorldCat member libraries worldwide
1 edition published in 1965 in Japanese and held by 4 WorldCat member libraries worldwide
Suri kogaku no sekai(
Book
)
1 edition published in 2019 in Japanese and held by 3 WorldCat member libraries worldwide
1 edition published in 2019 in Japanese and held by 3 WorldCat member libraries worldwide
Wareware no seikatsu to kōgai(
Book
)
1 edition published in 1971 in Japanese and held by 3 WorldCat member libraries worldwide
1 edition published in 1971 in Japanese and held by 3 WorldCat member libraries worldwide
Kyoto daigaku kenchikugaku hyakunen no ayumi(
Book
)
1 edition published in 2021 in Japanese and held by 3 WorldCat member libraries worldwide
1 edition published in 2021 in Japanese and held by 3 WorldCat member libraries worldwide
Nonlinearity criteria of Boolean functions by Shouichi Hirose(
Book
)
1 edition published in 1994 in English and held by 2 WorldCat member libraries worldwide
1 edition published in 1994 in English and held by 2 WorldCat member libraries worldwide
A linear time algorithm for Hamiltonian cycle problem on memory type processor array by
Hisakazu Matsuoka(
Book
)
1 edition published in 1993 in English and held by 2 WorldCat member libraries worldwide
Abstract: "A linear time algorithm for the Hamiltonian cycle problem or a typical NP-complete problem is presented in this paper, which is executed on a newly proposed computer architecture called Memory Type Processor Array or MTPA. In this algorithm, at first, all the processing elements (PEs) of the MTPA receive all vertices' data of a given graph G of n vertices and m edges in O(n) time. Then every combination of edges is fed to a respective PE by utilizing its address, or edge i, from i = 1 to m successively, is read simultaneously by all PEs whose ith bit of address is 1. In PEs, the read edges are successively connected to form a subgraph of G by using its vertex data. Attention is paid on PEs which read exactly n edges, where it is checked whether they form a single cycle or a Hamiltonian cycle. All these operations in total are done in O(m+n) time. Several memory based architectures have been proposed till now, for example, a parallel computation model with a functional memory CA-RAM by Takagi, Takenaga and Yajima, and FMPP by Yasuura et. al., etc. However linear time algorithm for the Hamiltonian cycle problem has not yet been shown. Using today's technology, it is possible to realize the MTPA of the modest size and in the near future much bigger sized machine will become a reality. This algorithm is evaluated by simulation and estimated about 1200 times quicker on this model than using ordinary back tracking method on ordinary random access machines, when 4-dimensional hypercube is used as an example."
1 edition published in 1993 in English and held by 2 WorldCat member libraries worldwide
Abstract: "A linear time algorithm for the Hamiltonian cycle problem or a typical NP-complete problem is presented in this paper, which is executed on a newly proposed computer architecture called Memory Type Processor Array or MTPA. In this algorithm, at first, all the processing elements (PEs) of the MTPA receive all vertices' data of a given graph G of n vertices and m edges in O(n) time. Then every combination of edges is fed to a respective PE by utilizing its address, or edge i, from i = 1 to m successively, is read simultaneously by all PEs whose ith bit of address is 1. In PEs, the read edges are successively connected to form a subgraph of G by using its vertex data. Attention is paid on PEs which read exactly n edges, where it is checked whether they form a single cycle or a Hamiltonian cycle. All these operations in total are done in O(m+n) time. Several memory based architectures have been proposed till now, for example, a parallel computation model with a functional memory CA-RAM by Takagi, Takenaga and Yajima, and FMPP by Yasuura et. al., etc. However linear time algorithm for the Hamiltonian cycle problem has not yet been shown. Using today's technology, it is possible to realize the MTPA of the modest size and in the near future much bigger sized machine will become a reality. This algorithm is evaluated by simulation and estimated about 1200 times quicker on this model than using ordinary back tracking method on ordinary random access machines, when 4-dimensional hypercube is used as an example."
Kyōto daigaku kōgakubu : Kōgaku kenkyūka enerugī kagaku kenkyūka(
Book
)
1 edition published in 1997 in Japanese and held by 2 WorldCat member libraries worldwide
1 edition published in 1997 in Japanese and held by 2 WorldCat member libraries worldwide
A distributed shared memory multiprocessor : ASURA : memory and cache architectures by
S. I Mori(
Book
)
1 edition published in 1993 in English and held by 2 WorldCat member libraries worldwide
Abstract: "ASURA is a large scale, cluster-based, distributed, shared memory, multiprocessor being developed at Kyoto University and Kubota Corporation. Up to 128 clusters are interconnected to form an ASURA system of up to 1024 processors. The basic concept of the ASURA design is to take advantage of the hierarchical structure of the system. Implementing this concept, a large shared cache is placed between each cluster and the inter-cluster network. The shared cache and the shared memories distributed among the clusters form part of ASURA's hierarchical memory architecture, providing various unique features to ASURA. In this paper, the hierarchical memory architecture of ASURA and its unique cache coherence scheme, including a proposal of a new hierarchical directory scheme, are described with some simulation results."
1 edition published in 1993 in English and held by 2 WorldCat member libraries worldwide
Abstract: "ASURA is a large scale, cluster-based, distributed, shared memory, multiprocessor being developed at Kyoto University and Kubota Corporation. Up to 128 clusters are interconnected to form an ASURA system of up to 1024 processors. The basic concept of the ASURA design is to take advantage of the hierarchical structure of the system. Implementing this concept, a large shared cache is placed between each cluster and the inter-cluster network. The shared cache and the shared memories distributed among the clusters form part of ASURA's hierarchical memory architecture, providing various unique features to ASURA. In this paper, the hierarchical memory architecture of ASURA and its unique cache coherence scheme, including a proposal of a new hierarchical directory scheme, are described with some simulation results."
Car following theory and stability limit of traffic volume by
Eiji Kometani(
Book
)
1 edition published in 1961 in English and held by 2 WorldCat member libraries worldwide
1 edition published in 1961 in English and held by 2 WorldCat member libraries worldwide
Expressive power of read-k-times-only branching programs by Y Takenaga(
Book
)
1 edition published in 1995 in English and held by 2 WorldCat member libraries worldwide
Abstract: "Expressive power of branching programs under restrictions on the number of times to read each input is considered. A blockwise branching program, on which input variables can be read several times in different orders, is defined and is compared with the models with different restrictions on the order to read inputs. It is proved that under read-k-times-only restriction (k [> or =] 2), the expressive power of polynomial size oblivious branching programs, blockwise branching programs and (k, *)-programs are different."
1 edition published in 1995 in English and held by 2 WorldCat member libraries worldwide
Abstract: "Expressive power of branching programs under restrictions on the number of times to read each input is considered. A blockwise branching program, on which input variables can be read several times in different orders, is defined and is compared with the models with different restrictions on the order to read inputs. It is proved that under read-k-times-only restriction (k [> or =] 2), the expressive power of polynomial size oblivious branching programs, blockwise branching programs and (k, *)-programs are different."
Combinatorial algorithms by Boolean processing by Ichiro Semba(
Book
)
1 edition published in 1993 in English and held by 2 WorldCat member libraries worldwide
Abstract: "So far, backtrack technique has been used to solve various problems of generating all the combinatorial objects. However, in order to obtain solutions efficiently, we need to make efforts to find out suitable data structures according to each problem. In this paper, we show many combinatorial problems can be written briefly by using Boolean functions. In order to obtain all solutions, Boolean function has been represented by a Binary Decision Diagram (BDD) and manipulated by an efficient BDD manipulator. As an example, we will examine in detail the problem of generating all the partitions of the set [1,2 ..., n]."
1 edition published in 1993 in English and held by 2 WorldCat member libraries worldwide
Abstract: "So far, backtrack technique has been used to solve various problems of generating all the combinatorial objects. However, in order to obtain solutions efficiently, we need to make efforts to find out suitable data structures according to each problem. In this paper, we show many combinatorial problems can be written briefly by using Boolean functions. In order to obtain all solutions, Boolean function has been represented by a Binary Decision Diagram (BDD) and manipulated by an efficient BDD manipulator. As an example, we will examine in detail the problem of generating all the partitions of the set [1,2 ..., n]."
more

fewer

Audience Level
0 |
![]() |
1 | ||
General | Special |

Associated Subjects
Algebra, Boolean Algorithms Architecture Architecture--Periodicals Architecture--Study and teaching (Higher) Asia Branching processes Buddhist art Buddhist sculpture Cache memory Chemical engineering Chemistry Chemists China China--Great Wall of China China--Inner Mongolia China--Juyong Guan Coastal engineering--Research College buildings Combinatorial analysis Computer architecture Computer storage devices Cryptography Directed graphs Electronic data processing--Distributed processing Engineering Engineering mathematics Engineering--Societies, etc Graph theory Housing Inscriptions, Chinese Japan Japan--Kyoto Kyōto Daigaku.--Bōsai Kenkyūjo Kyōto Daigaku.--Kōgakubu Multiprocessors NP-complete problems Parallel computers Paths and cycles (Graph theory) Pollution Queuing theory Regional planning Relief (Sculpture) Sculpture, Chinese--Ming-Qing dynasties Students Traffic flow--Mathematical models
Alternative Names
Kyōto Daigaku. Daigakuin Kōgaku Kenkyūla, Kogakubu
Kyōto Teikoku Daigaku. Kōgakubu
College of Engineering
College of Engineering Kyōto, Kyōto-Daigaku
Faculty of Engineering
Faculty of Engineering Kyōto
Faculty of Engineering, Kyoto University
Kōgakubu
Kōgakubu Kyōto
Kyōto-Daigaku College of Engineering
Kyōto-Daigaku College of Engineering Kōgakubu
Kyōto Daigaku. Department of Engineering
Kyōto Daigaku Dept. of Engineering
Kyōto Daigaku Engineering Faculty
Kyōto-Daigaku Faculty of Engineering
Kyoto Daigaku Kogakubu
Kyoto University Faculty of Engineering
キョウト ダイガク コウガクブ
京都大學 工學部
Languages