WorldCat Identities

Sadayappan, P.

Overview
Works: 82 works in 127 publications in 3 languages and 1,359 library holdings
Genres: Conference papers and proceedings  Academic theses 
Roles: Author, Other, Editor, Opponent, Thesis advisor, 958, htt
Publication Timeline
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Most widely held works by P Sadayappan
High performance computing : HiPC 2008 : 15th international conference, Bangalore, India, December 17-20, 2008 : proceedings by International Conference on High Performance Computing( )

16 editions published in 2008 in English and Undetermined and held by 511 WorldCat member libraries worldwide

This book constitutes the refereed proceedings of the 15th International Conference on High-Performance Computing, HiPC 2008, held in Bangalore, India, in December 2008. The 46 revised full papers presented together with the abstracts of 5 keynote talks were carefully reviewed and selected from 317 submissions. The papers are organized in topical sections on applications performance optimizazion, parallel algorithms and applications, scheduling and resource management, sensor networks, energy-aware computing, distributed algorithms, communication networks as well as architecture
2000 International Workshops on Parallel Processing : proceedings : 21-24 August, 2000, Toronto, Canada by International Conference on Parallel Processing Workshops( )

5 editions published in 2000 in English and held by 240 WorldCat member libraries worldwide

2003 International Conference on Parallel Processing : proceedings : 6-9 October, 2003, Kaohsiung, Taiwan by International Conference on Parallel Processing( )

8 editions published in 2003 in English and held by 225 WorldCat member libraries worldwide

Languages and compilers for parallel computing : 8th international workshop, LCPC '95, Columbus, Ohio, USA, August 1995 : proceedings by C.-H Huang( )

5 editions published in 1996 in English and Italian and held by 125 WorldCat member libraries worldwide

This book presents the refereed proceedings of the Eighth Annual Workshop on Languages and Compilers for Parallel Computing, held in Columbus, Ohio in August 1995. The 38 full revised papers presented were carefully selected for inclusion in the proceedings and reflect the state of the art of research and advanced applications in parallel languages, restructuring compilers, and runtime systems. The papers are organized in sections on fine-grain parallelism, interprocedural analysis, program analysis, Fortran 90 and HPF, loop parallelization for HPF compilers, tools and libraries, loop-level optimization, automatic data distribution, compiler models, irregular computation, object-oriented and functional parallelism
Languages and Compilers for Parallel Computing : 10th International Workshop, LCPC'97 Minneapolis, Minnesota, USA, August 7-9, 1997 Proceedings by Zhiyuan Li( )

3 editions published in 1998 in English and held by 48 WorldCat member libraries worldwide

Annotation
Proceedings of the 15th international conference on High performance computing by P Sadayappan( )

2 editions published in 2008 in English and held by 32 WorldCat member libraries worldwide

Languages and Compilers for Parallel Computing : 8th International Workshop, LCPC '95 Columbus, Ohio, USA, August 10-12, 1995 Proceeding by C.-H Huang( )

1 edition published in 1996 in English and held by 31 WorldCat member libraries worldwide

Languages and compilers for parallel computing : 18th international workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005 : revised selected papers by Eduard Ayguadé( )

5 editions published in 2006 in English and held by 29 WorldCat member libraries worldwide

This book constitutes the thoroughly refereed post-proceedings of the 18th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2005, held in Hawthorne, NY, USA in October 2005. The 26 revised full papers and 8 short papers presented were carefully selected during two rounds of reviewing and improvement. The papers are organized in topical sections on register optimization, compiling for FPGA's and network processors, model-driven and empirical optimization, parallel languages, speculative execution, run-time environments, high-productivity languages for HPC: compiler
Languages and compilers for parallel computing : 10th international workshop, LCPC'97, Minneapolis, Minnesota, USA, August 7-9, 1997 : proceedings by Zhiyuan Li( )

3 editions published in 1998 in English and held by 22 WorldCat member libraries worldwide

This book constitutes the thoroughly refereed post-workshop proceedings of the 10th International Workshop on Languages and Compilers for Parallel Computing, LCPC'97, held in Minneapolis, Minnesota, USA in August 1997 The book presents 28 revised full papers together with four posters; all papers were carefully selected for presentation at the workshop and went through a thorough reviewing and revision phase afterwards. The papers are organized in topical sections on data locality, program analysis, automatic parallelization, HPF extensions and compilers, synchronization and communication, parallel programming models and language extensions, and instruction level parallelism
High Performance Computing - HiPC 2008 15th International Conference, Bangalore, India, December 17-20, 2008. Proceedings by David Hutchison( )

1 edition published in 2008 in Undetermined and held by 14 WorldCat member libraries worldwide

Optimisation de la localité des données sur architectures manycœurs by Duco van Amstel( )

1 edition published in 2016 in French and held by 3 WorldCat member libraries worldwide

The continuous evolution of computer architectures has been an important driver of research in code optimization and compiler technologies. A trend in this evolution that can be traced back over decades is the growing ratio between the available computational power (IPS, FLOPS, ...) and the corresponding bandwidth between the various levels of the memory hierarchy (registers, cache, DRAM). As a result the reduction of the amount of memory communications that a given code requires has been an important topic in compiler research. A basic principle for such optimizations is the improvement of temporal data locality: grouping all references to a single data-point as close together as possible so that it is only required for a short duration and can be quickly moved to distant memory (DRAM) without any further memory communications.Yet another architectural evolution has been the advent of the multicore era and in the most recent years the first generation of manycore designs. These architectures have considerably raised the bar of the amount of parallelism that is available to programs and algorithms but this is again limited by the available bandwidth for communications between the cores. This brings some issues thatpreviously were the sole preoccupation of distributed computing to the world of compiling and code optimization techniques.In this document we present a first dive into a new optimization technique which has the promise of offering both a high-level model for data reuses and a large field of potential applications, a technique which we refer to as generalized tiling. It finds its source in the already well-known loop tiling technique which has been applied with success to improve data locality for both register and cache-memory in the case of nested loops. This new "flavor" of tiling has a much broader perspective and is not limited to the case of nested loops. It is build on a new representation, the memory-use graph, which is tightly linked to a new model for both memory usage and communication requirements and which can be used for all forms of iterate code.Generalized tiling expresses data locality as an optimization problem for which multiple solutions are proposed. With the abstraction introduced by the memory-use graph it is possible to solve this optimization problem in different environments. For experimental evaluations we show how this new technique can be applied in the contexts of loops, nested or not, as well as for computer programs expressed within a dataflow language. With the anticipation of using generalized tiling also to distributed computations over the cores of a manycore architecture we also provide some insight into the methods that can be used to model communications and their characteristics on such architectures.As a final point, and in order to show the full expressiveness of the memory-use graph and even more the underlying memory usage and communication model, we turn towards the topic of performance debugging and the analysis of execution traces. Our goal is to provide feedback on the evaluated code and its potential for further improvement of data locality. Such traces may contain information about memory communications during an execution and show strong similarities with the previously studied optimization problem. This brings us to a short introduction to the algorithmics of directed graphs and the formulation of some new heuristics for the well-studied topic of reachability and the much less known problem of convex partitioning
Global arrays by Jarek Nieplocha( Book )

1 edition published in 2010 in English and held by 3 WorldCat member libraries worldwide

Proceedings by International Workshop on Parallel Processing( Book )

3 editions published between 2000 and 2003 in English and Undetermined and held by 3 WorldCat member libraries worldwide

The evaluation of functional programs on a hierarchical multicomputer by P Sadayappan( Book )

2 editions published in 1983 in English and held by 2 WorldCat member libraries worldwide

Optimal static scheduling of sequential loops on multiprocessors by Amr Zaky( Book )

2 editions published in 1988 in English and held by 2 WorldCat member libraries worldwide

Proceedings : 6-9 October 2003, Kaohsiung, Taiwan by International Conference on Parallel Processing( Book )

1 edition published in 2003 in English and held by 2 WorldCat member libraries worldwide

High Performance Computing - HiPC 2008 00 : 15th International Conference, Bangalore, India, December 17-20, 2008. Proceedings( )

1 edition published in 2008 in English and held by 2 WorldCat member libraries worldwide

Parallel graph partitioning on a hypercube by P Sadayappan( Book )

2 editions published in 1988 in English and held by 2 WorldCat member libraries worldwide

Dynamic scheduling of DOACROSS loops for multiprocessors by V. P Krothapalli( Book )

2 editions published in 1988 in English and held by 2 WorldCat member libraries worldwide

Compile-time and run-time strategies for array statement execution on distributed-memory machines by Shivnandan D Kaushik( )

1 edition published in 1995 in English and held by 1 WorldCat member library worldwide

To efficiently perform array redistribution, precise closed forms for enumerating the communication sets are developed for two special cases of array redistribution involving block-cyclically distributed arrays. The general case for array redistribution involving block-cyclically distributed arrays can be expressed in terms of these special cases. Using the closed forms, a distributed algorithm for scheduling the communication for redistribution to eliminate node contention is developed. The algorithm has a lower communication and scheduling overhead than those presented in the literature. Based on the closed forms, a cost model for estimating the communication overhead for array redistribution is developed. Using this model, a multi-phase approach for reducing the communication cost of array redistribution is presented. Experimental results on the IBM SP2 and Cray T3D validate the proposed cost model and demonstrate the efficacy of the multi-phase approach
 
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High performance computing : HiPC 2008 : 15th international conference, Bangalore, India, December 17-20, 2008 : proceedings Proceedings of the 15th international conference on High performance computing
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2000 International Workshops on Parallel Processing : proceedings : 21-24 August, 2000, Toronto, CanadaLanguages and compilers for parallel computing : 8th international workshop, LCPC '95, Columbus, Ohio, USA, August 1995 : proceedingsLanguages and Compilers for Parallel Computing : 10th International Workshop, LCPC'97 Minneapolis, Minnesota, USA, August 7-9, 1997 ProceedingsProceedings of the 15th international conference on High performance computingLanguages and compilers for parallel computing : 18th international workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005 : revised selected papersLanguages and compilers for parallel computing : 10th international workshop, LCPC'97, Minneapolis, Minnesota, USA, August 7-9, 1997 : proceedingsProceedings
Alternative Names
Sadayappan, P.

Sadayappan, Ponnuswamy

Languages