WorldCat Identities

Auguin, Michel

Overview
Works: 46 works in 59 publications in 2 languages and 349 library holdings
Genres: Conference papers and proceedings 
Roles: Thesis advisor, Author, Opponent, Other, Publishing director, Editor
Publication Timeline
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Most widely held works by Michel Auguin
Proceedings of the 21st International Conference on Real-Time and Network Systems (RTNS) 2013 : 16-18 October, 2013, Sophia Antipolis, France by International Conference on Real-Time and Network Systems( )

1 edition published in 2013 in English and held by 237 WorldCat member libraries worldwide

Proceedings of the 21st International conference on Real-Time Networks and Systems by Michel Auguin( )

1 edition published in 2013 in English and held by 25 WorldCat member libraries worldwide

Proceedings of the 21st International Conference on Real-Time and Networks Systems (RTNS) 2013 : 16-18 October 2013, Sophia Antipolis, France by Michel Auguin( )

2 editions published in 2013 in Undetermined and English and held by 15 WorldCat member libraries worldwide

Architecture des ordinateurs by Symposium sur l'architecture des ordinateurs (Sympa'5)( Book )

2 editions published in 2005 in French and held by 10 WorldCat member libraries worldwide

RenPar'15, CFSE'3, SympAAA'2003 : actes = proceedings by 15emes rencontres francophones en parallélisme( Book )

1 edition published in 2003 in English and held by 4 WorldCat member libraries worldwide

Conception des systèmes de commande à l'aide de réseaux logiques programmables by Michel Auguin( Book )

1 edition published in 1978 in French and held by 3 WorldCat member libraries worldwide

Rappels sur les réseaux de Pétri et les réseaux logiques programmables. Méthode de réalisation des réseaux de Pétri sur FPLA. Étude de la partie combinatoire, simplification des multi-expressions booléennes. Programmation de la méthode, étude d'un exemple
Etude d'une solution de localisation dans un réseau de capteurs sans fils by Florian Barrau( Book )

2 editions published in 2014 in English and held by 2 WorldCat member libraries worldwide

Tracking sensors in a wireless network leads to many applications. However, current techniques based on the received signal strength are unreliable given the stability of measurements. More accurate techniques inspired from radars have been proposed but they require an expensive radio. However, one of the most difficult aspects regarding the localization in a wireless sensor network remains their inadequacy with their low-cost and low-power characteristics. For example, clock generation of ZigBee modems introduce strong uncertainties regarding the reliability of measurements. Demanding digital algorithms must be carefully studied and improved in order not to exceed requirements defined by industrials. In other words, the purpose is to design an implementation as cheap as possible while keeping a minimum accuracy. The work of this thesis focuses on two main objectives: the development of a digital circuit capable of calculating time of arrivals, and the development of prototypes for a future positioning feature. The main constraint is the use of a single channel from the ZigBee 802.15.4 standard. This work enabled to understand issues regarding the distance measurements and adapt them given wireless sensor network constraints
Synthèse des ressources de communication pour la conception de systèmes embarqués temps réel flots de données by Fernand Cuesta( Book )

2 editions published in 2001 in French and held by 2 WorldCat member libraries worldwide

ARCHITECTURE GENERIQUE ET SYNTHESE DES COMMUNICATIONS POUR LA CONCEPTION CONJOINTE DE SYSTEMES EMBARQUES LOGICIEL/MATERIEL by Guy Gogniat( Book )

2 editions published in 1997 in French and held by 2 WorldCat member libraries worldwide

LES PROGRES TECHNOLOGIQUES CONSTANTS DANS LES DOMAINES DES ASIC ET DES CURS DE PROCESSEURS PERMETTENT D'INTEGRER DES SYSTEMES EMBARQUES DE COMPLEXITE CROISSANTE AU SEIN D'UN MEME CIRCUIT. PAR AILLEURS, DEPUIS QUELQUES ANNEES L'UTILISATION DE SYSTEMES EMBARQUES DEVIENT REGULIERE DANS DE NOMBREUX DOMAINES D'APPLICATION. LEURS IMPLEMENTATIONS NECESSITENT GENERALEMENT LA MISE EN UVRE DE COMPOSANTS HETEROGENES ET LA VERIFICATION DE CONTRAINTES DE CONCEPTION SEVERES (E.G., SURFACE, PERFORMANCE, CONSOMMATION). DE PLUS, LES EXIGENCES DES UTILISATEURS ENTRAINE LA DIMINUTION DES DUREES DE VIE DE CES SYSTEMES EMBARQUES. AINSI, L'IMPORTANCE DE LA CONCEPTION CONJOINTE LOGICIEL/MATERIEL CROIT FORTEMENT AFIN D'AIDER LES CONCEPTEURS A RESPECTER LES CONTRAINTES DE TIME TO MARKET. LA CONCEPTION DES INTERFACES DE COMMUNICATION ENTRE LES COMPOSANTS LOGICIELS ET MATERIELS DE L'ARCHITECTURE GARANTISSANT DES TRANSFERTS DE DONNEES ET DE CONTROLE CORRECTS EST PARTICULIEREMENT LONGUE ET DIFFICILE. AINSI, SUR LA BASE D'UNE ARCHITECTURE GENERIQUE DEDIEE AUX APPLICATIONS EMBARQUEES DE TELECOMMUNICATION ET DE MULTIMEDIA, NOUS PROPOSONS UNE METHODE DE SYNTHESE DES COMMUNICATIONS QUI REALISE LA CARACTERISATION ET L'IMPLEMENTATION DES COMMUNICATIONS DANS L'ARCHITECTURE FINALE. CETTE METHODE PREND PLACE APRES LES ETAPES DE PARTITIONNEMENT ET D'ORDONNANCEMENT ET PEUT CONSTITUER LES FONDEMENTS D'UNE APPROCHE DE CONCEPTION CONDUISANT A L'INTEGRATION LOGICIEL ET MATERIEL D'APPLICATIONS DE TRAITEMENT DU SIGNAL
Étude de la gestion de l'autonomie en énergie d'objets communicants sans fil by Andrea Castagnetti( Book )

2 editions published in 2012 in French and held by 2 WorldCat member libraries worldwide

Wireless Sensor Networks are composed of nodes equipped with a computational unit, sensors and a radio transceiver. Energy consumption is a major challenge in the WSN domain, and energy efficient solutions are required because the nodes carry a limited amount of power. Energy harvesting technologies can be used to scavenge energy from the environment, thus prolonging the lifespan of a WSN node. The goal of this thesis is on power management techniques
Changement de contexte matériel sur FPGA, entre équipements reconfigurables et hétérogènes dans un environnement de calcul distribué by Alban Bourge( )

1 edition published in 2016 in French and held by 2 WorldCat member libraries worldwide

Dynamically reconfigurable architectures offer theoretically excellent trade-off between performance and flexibility. Practically, these architectures are based on one or several processors and several reconfigurable cells. A reconfigurable cell can load, execute and unload hardware accelerators. This property enables virtualization of hardware tasks. In this context, an application can take benefit from both software flexibility and hardware performance. In current reconfigurable architectures, hardware tasks are limited to cooperative multi-tasking, since reconfiguration time and context-storing time are expensive. While reconfiguration time is architecture-dependent, the time required to store or restore the context strongly depends on applications running on hardware tasks. Reducing this context-switch time is mandatory to offer to hardware task a preemptive multi-tasking, just like software tasks. Several methods exist to perform the hardware context-switch operations in an homogeneous cell context: dedicated readback chain on reconfigurable fabrics, checkpoints, scan-chain on live context. But, nothing has been proposed in an heterogeneous fabric context (e.g. a cloud providing hardware acceleration on various kind of FPGA board).The goal of this thesis is to propose new methodologies and algorithms to enable hardware context-switch even between heterogeneous hardware targets. During the thesis, the student will have to:- Realize a bibliography on the existing hardware task preemption methods in homogeneous cell context.- Propose algorithms that enable a lightweight and generic context switch solution for hardware tasks.- Validate these algorithms by their integration in a hardware accelerator generation flow. Thus, the extended flow can generate in addition of the hardware task of an application, the dedicated hardware support for context-switch.- Propose an generation strategy (incremental, multi-target,...) suitable for heterogeneous targets. The strategy has to preserve synchronization points between targets- Prototype proof-of-concepts on the strategy on an FPGA cloud
METHODE D'ESTIMATION DE PERFORMANCE LOGICIELLE : APPLICATION AU DEVELOPPEMENT RAPIDE DE CODE OPTIMISE POUR UNE CLASSE DE PROCESSEURS DSP by Alain Pegatoquet( Book )

2 editions published in 1999 in French and held by 2 WorldCat member libraries worldwide

LES COMPILATEURS C POUR PROCESSEURS DSP ACTUELLEMENT DISPONIBLES SONT GENERALEMENT INCAPABLES DE GENERER UN CODE ASSEMBLEUR RESPECTANT LES CONTRAINTES TEMPS REEL FORTES DES SYSTEMES EMBARQUES. LES COUTS DE DEVELOPPEMENT ELEVES ASSOCIES AU CODAGE MANUEL D'APPLICATIONS SUR DSP ET LA PRESSION SANS CESSE PLUS FORTE DU TIME-TO-MARKET RENDENT CETTE SITUATION DE PLUS EN PLUS INACCEPTABLE POUR LES ENTREPRISES ET MILITENT EN FAVEUR D'UNE APPROCHE DE HAUT NIVEAU BASEE SUR L'UTILISATION DE COMPILATEURS. OR, SI LES COMPILATEURS POUR DSP SONT GLOBALEMENT INEFFICACES, IL EST TOUTEFOIS POSSIBLE D'AMELIORER DE MANIERE SIGNIFICATIVE LES PERFORMANCES DU CODE ASSEMBLEUR GENERE EN MODIFIANT LE CODE C D'ORIGINE POUR LE COMPILATEUR CIBLE (I.E. L'ARCHITECTURE CIBLE) SUR LES PARTIES DE CODE CRITIQUES DE L'APPLICATION. CES PROBLEMES ONT MOTIVE L'ELABORATION DE NOUVEAUX OUTILS PERMETTANT D'ACCELERER CE PROCESSUS. NOUS PROPOSONS POUR CELA D'UTILISER DES METHODES D'ESTIMATIONS LOGICIELLES QUI FOURNISSENT, A PARTIR D'UNE DESCRIPTION EN C DE L'APPLICATION, D'UNE PART LES PERFORMANCES DU CODE ASSEMBLEUR GENERE SANS UTILISER DE SIMULATEUR DE NIVEAU INSTRUCTION ET D'AUTRE PART LES PERFORMANCES D'UN CODE ASSEMBLEUR OPTIMISE. CE DERNIER CODE CORRESPOND A UNE ESTIMATION D'UN CODE ECRIT PAR UN PROGRAMMEUR EXPERIMENTE. PAR COMPARAISON DES DEUX PERFORMANCES IL EST AISE DE LOCALISER RAPIDEMENT LES PARTIES A OPTIMISER DANS LE CODE C DE L'APPLICATION. PAR CETTE APPROCHE ON LIMITE AINSI AUX PARTIES REELLEMENT CRITIQUES, IDENTIFIEES PAR LA METHODE, LA NECESSITE DE DEVELOPPER DU CODE ASSEMBLEUR (SI NECESSAIRE). LE MODELE D'ESTIMATION UTILISE EST MULTICIBLE ET SE BASE SUR UNE REPRESENTATION INTERMEDIAIRE ORIENTEE SCHEMA DE CALCUL DSP. DE NOMBREUSES EXPERIMENTATIONS SUR DES APPLICATIONS INDUSTRIELLES ILLUSTRENT L'INTERET DE L'APPROCHE
Une approche à base de composants logiciels pour l'observation de systèmes embarqués by Carlos Hernan Prada Rojas( )

1 edition published in 2011 in French and held by 2 WorldCat member libraries worldwide

Embedded software development faces new challenges as embedded devices evolve from Multiprocessor Systems on Chip (MPSoC) with heterogeneous CPU towards many-core architectures. The classical approach of optimizing embedded software in a platform-specific way is no longer applicable as it is too costly. Moreover, there is no consensus on the programming environments to be used for the new and rapidly changing embedded architectures. MPSoC software development needs debugging tools. These tools are based on observation techniques whose role is to gather information about the embedded system execution. Current techniques support only a limited number of processors and are highly dependent on hardware characteristics. In this thesis, we propose EMBera, a component-based approach to MPSoC observation. EMBera aims at providing genericity, portability, scalability and intrusion control. Genericity is obtained by encapsulating specific embedded features and exporting generic observation interfaces. Portability is achieved through components targeting common treatments for MPSoCs but allowing specialization. Scalability is achieved by observing only the elements of interest from the system, namely application modules, hardware components or the different levels of the software stack. Intrusion control is facilitated by the possibility to configure the type and the level of detail of data collection mechanisms. The EMBera approach is validated by different case studies using different hardware and software configurations. We show that our approach provides a real added value in supporting the embedded software development
Hybrid power management in real time embedded systems: an interplay of DVFS and DPM techniques by Muhammad Khurram Bhatti( )

1 edition published in 2011 in English and held by 2 WorldCat member libraries worldwide

Partitionnement en ligne d'applications flots de données pour des architectures temps réel auto-adaptatives by Fakhreddine Ghaffari( Book )

2 editions published in 2006 in French and held by 2 WorldCat member libraries worldwide

The current challenges of the development of the complex embedded systems such as the integrated systems of image processing, consist to successfully realizing products reliable, powerful, inexpensive and effective whatever the conditions of use. To take up these challenges passes by a good choice of architecture, methods and tools adapted to the applications concerned and target technologies. For many applications, in particular in telecommunication and multi-media, soft real time realizations are often sufficient, i.e. implementations aiming to obtaining a quality of service adapted to the needs. Instead of being based on the Worse Case Execution Times (WCET) or sequences of test often not very representative to design these systems, our approach targets a self-adapting platform able to be configured during the execution of the application (thus on line). We can quote as examples of applications the case of a fixed camera of remote monitoring which adapts its processing according to the nature of the acquired images or a multimode mobile terminal which changes its standard of transmission if the quality of the communication channel requires it. The reconfigurable components have levels of performances and flexibility which make them very attractive in a growing number of developments. Dynamic reconfiguration (partial or full) makes it possible to re-use the same hardware resources for a succession of processing, and this in similar way to a software realization. We propose an approach allowing to allocate and schedule dynamically the tasks of a data flow application according to an estimate of their execution times in order to respect the time constraints as well as possible. This on line reconfiguration requires research of compromise complexity/effectiveness of the allocation and scheduling in order to optimize the quality of service and to reduce their costs of realization
Overhead control in optimal global scheduling algorithms for real-time multiprocessor systems by Muhammad Naeem Shehzad( Book )

2 editions published in 2013 in French and held by 2 WorldCat member libraries worldwide

En théorie, les algorithmes optimaux d'ordonnancement global permettent d'obtenir une meilleure utilisation des ressources processeur que les algorithmes d'ordonnancement partitionnés, mais pratiquement ils sont considérés comme inférieurs, car ils provoquent une grande quantité de surcoûts d'exécution. Cette surcharge est due à des points d'ordonnancement fréquents, ainsi que les migrations et les préemptions pour les tâches. Dans cette thèse, nous avons choisi une classe d'ordonnancement optimal connu sous le nom de DP-Fair et nous avons mis au point quelques techniques pour maîtriser la surcharge sans affecter l'optimalité. Nous avons proposé deux heuristiques, une contrôle le nombre de préemptions et la seconde le nombre de migrations. Nous avons utilisé une approche statistique pour évaluer la performance de nos heuristiques. Les résultats obtenus sont très encourageants et montrent une réduction significative de la surcharge
Conception automatique de systèmes embarqués pour la téléphonie mobile 3G by François Caron( Book )

2 editions published in 2006 in French and held by 2 WorldCat member libraries worldwide

Due to new request from the market of the mobile phone, the new third generation of standards challenges designers. Actually, these standards define a multitude of services using different bitrates that the final customer can use. This capability implies a very high complexity at some points of the network, in particular for base-stations. Base stations of the third generation mobile networks should be able to process a lot of data received from and sending to a multitude of users, communicating at the same time. PhD work presented in this document is about the definition of a new software/hardware co-design tool. This tool called BERLIOZ, « emBedded systEM exploRation for pipeLIned executiOn optimiZation », offers to embedded systems designers a set of architectural solutions to the problems posed by third mobile generations standards like the UMTS. So, this tool can analyse applications of signal processing which periodicity can be shorter than their deadlines. The computation of solutions is done with the help of a heuristic composed of two genetic algorithms. The use of these algorithms allows to achieve solutions matching a set of constraints like the silicium area of a system. After the deep study of third generation standard called UMTS, we have validated our approach on a real industrial application : the design of the “Symbol rate” part of a UMTS base-station
A framework for modeling and simulating energy harvesting WSN nodes with efficient power management policies by Andrea Castagnetti( )

1 edition published in 2012 in English and held by 2 WorldCat member libraries worldwide

Approche par simulation supervisée pour la conception système d'architectures logicielles matérielles embarquées by Sébastien Icart( Book )

2 editions published in 2012 in French and held by 2 WorldCat member libraries worldwide

With the advances of transistors integration, systems on chip are more and more complex and include an increasing number functionality. Concurrently, under pressure of time to market, design methods, IP reuse and high-level simulation are all techniques to speed up the system design. However, during this process, the designer may be faced with unexpected behaviour due to complex interactions between components. Under these conditions it becomes difficult and tedious to define architecture capable of performing all the functionalities while reducing costs. Therefore, to facilitate the design of the architecture, we propose a supervised simulations design approach. In this method, we add observers in the system collecting data from simulation and able to transmit them to an artificial neural network. The purpose of this network is to propose a set of architectural parameters allowing constraints to be satisfied. Using this method on a embedded multimedia application shows that with appropriate development of the neural network, it is able to provide relevant values of architectural parameters. The quality of the solution depends mainly on the representativeness of observations and of the network learning process
Approche multi-niveaux pour la conception de réseaux de capteurs sans fil optimisés en énergie by Zeeshan Ali Khan( Book )

2 editions published in 2011 in French and held by 2 WorldCat member libraries worldwide

The sensor networks are considered to have the potential to create efficient monitoring applications. A typical wireless sensor node comprises of sensing, computing and networking capabilities. These devices are cooperatively networked to gather process and forward the data towards the interested users. They have limited battery capacity and sometimes the battery replacement is not considered to be a practical option. In case of video monitoring applications, they have to forward the multimedia packets having real-time deadlines. Thus, there is a need to have an energy efficient and minimum delay data dissemination design techniques based on the application requirement. Keeping in mind the processing capabilities of these devices, it is considered a challenging task. This thesis presents an energy efficient and minimum delay data dissemination design for a disaster management application installed inside a building. In this application, a building is considered to be a disastrous situation such at on fire. Based on the data forwarded by the installed sensor network, the first responders decide the rescue and first extinguishing strategy. There exists two class of network associated with the application. On considers the monitoring of physical parameters such as temperature, pressure and humidity inside the building and the second one performs the task of video surveillance inside the network. Sensing physical parameters do not need large processing capabilities due to less amount of data communication. Thus, the main research interest is to optimize the energy consumption due to date transmission. On the other hand, video surveillance application has to forward a large amount of video streaming packets. There is a need to not only minimize the energy consumption but also to minimize the packet delivery delay it orders to meet the application layer deadlines. Thus, we focus on the efficient delivery of data for these two network classes. The first contribution of the thesis talks about the virtual data dissemination architecture for collecting the data in an energy efficient manner. The considered network collects the physical parameters such as temperature, pressure and humidity inside the building. The second contribution focuses on the energy efficient minimum delay routing metrics for the video streaming application operating inside the building. It minimizes the delay so that the application layer deadlines are fulfilled with minimum energy consumption. The third contribution explores the usage of multichannel design in the sensor network. The centralized and distributed channel allocation mechanisms are described that tries to minimize the interference between communicating nodes in order to increase the network throughput. The first contribution targets the physical parameters monitoring network and second and third contribution focuses on video surveillance network. The efficiency of the proposed approaches are evaluated through simulations in Network Simulator NS-2
 
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Languages
French (23)

English (8)